Process for making self-aligned source/drain polysilicon or poly

Details Process for making self-aligned source/drain polysilicon or poly Process for making self-aligned source/drain polysilicon or poly

1994-07-11

1995-03-14

Quach, T. N.

Fishing, trapping, and vermin destroying

437162, 437186, 437193, 437200, 437984, 748DIG20, H01L 21335

Patent

active

053977220

ABSTRACT:
A process for forming field effect transistors having self-aligned source/drain contact includes: forming an gate overlying a portion of a semiconductor; forming a first sidewall spacer on the gate; forming a source/drain region in the semiconductor; depositing a conductive layer over the semiconductor so that a step is formed in the conductive layer in a region overlying the gate and the first sidewall spacer; forming a second sidewall spacer on the step; forming a protective layer over a portion of the conducting layer not covered by the second sidewall spacer; removing the second sidewall spacer to expose a portion of the conductive layer but leave covered a portion of the conductive layer underlying the protective layer; and removing the exposed portion of the conductive layer to leave a portion of the conductive layer in contact with the source/drain region and electrically isolated from the gate. The portion of the conductive layer left is the self-aligned contact. Typically, the conductive layer is polysilicon but may alternatively be polysilicide or silicide.

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