Digital video memory

Static information storage and retrieval – Read/write circuit – With shift register

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Details

365 78, 36518905, 365220, 365221, G11C 700

Patent

active

056255942

ABSTRACT:
A digital video memory circuit. The circuit includes a DRAM for storing thereto and reading data therefrom, a register group having registers for holding data to be written to and read from the DRAM, a selector having switching transistors connecting registers in the register group to an I/O data bus, respectively, for storing data on the I/O data bus to the DRAM and for transferring data from the DRAM to the I/O data bus. The register group includes a first register set and a second register set connected serially between the DRAM and the selector, the second register set transferring data on the I/O data bus to the first register set, and the first register set transferring data from the second register set to the DRAM. The second register set can receive data on the I/O data bus while the first register set writes previously received data to the DRAM.

REFERENCES:
patent: 5029134 (1991-07-01), Watanabe
patent: 5265051 (1993-11-01), Jeong
patent: 5374851 (1994-12-01), Iwase et al.
patent: 5381378 (1995-01-01), Okimura
patent: 5463591 (1995-10-01), Aimoto et al.

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