DRAM matrix of basic organizational units each with pair of capa

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257303, 257306, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

059593210

ABSTRACT:
A dynamic random access memory (DRAM) organized as a matrix of basic organizational units each having a capacitor pair. Each capacitor pair has one of the first capacitors and one of the second capacitors in it. Each basic organizational unit is arranged as follows: a first word line and a second word line are formed, as parallel lines, on the substrate; the first word line lies between a first doped region and a second doped region to define a first transistor; the second word line lies between the second doped region of the first transistor and a third doped regions to define a second transistor; a bit line lies on the second doped region of the substrate at an oblique angle to the first word line and second word line; the first capacitor overlies the first doped region and the first word line, is substantially centered over the first doped region, is connected to the first doped region via a first contact hole, and has a hexagon-shaped planar portion; the second capacitor overlies the third doped region and the second word line, is substantially centered over the third doped region, is connected to the third doped region via a second contact hole, and has a hexagon-shaped planar portion; and a center point of each of the first doped region, second doped region and third doped region of the basic organizational unit are connectable by an imaginary straight characteristic line.

REFERENCES:
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patent: 5686746 (1997-11-01), Iwasa
patent: 5691551 (1997-11-01), Eimori
patent: 5770874 (1998-06-01), Egawa

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