System clock recovery apparatus for MPEG decoding system

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395559, G06F 104, G06F 108

Patent

active

058322566

ABSTRACT:
A system clock recovery apparatus in an MPEG decoding system for decoding a received system coded stream in the form of a transport stream or a program stream, includes a depacketizer for depacketizing the received stream and outputting decoding time data for representing a video decoding time, a system clock value and a video elementary stream, a detector for detecting a delayed value of a video buffering verifier (VBV) using the video elementary stream of the depacketizer and generating a detection indication signal for indicating a detected point of time of the delayed value of the VBV, and a system clock generator for varying the current system clock and the current system time clock according to the decoding time data and the system clock value of the depacketizer and the VBV delayed value and the detection indication signal of the detector.

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patent: 5559999 (1996-09-01), Maturi et al.
patent: 5565924 (1996-10-01), Haskell et al.
patent: 5652627 (1997-07-01), Allen

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