Integrated optical grating device by thermal SiO.sub.2 growth on

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430 1, 430 2, 430323, 427162, 350 9612, G03C 500

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044264402

ABSTRACT:
Disclosed is a method of producing an integrated optical grating device having extremely low scattering losses. The method employs a highly polished and prepared silicon chip for receiving a grating pattern or any other surface relief feature on the silicon wafer surface for its predetermined use. The pattern after it is generated is etched to a predetermined period, for example, when the pattern is for a waveguide device. An SiO.sub.2 growth layer is thermally grown to a thickness of about 4 to 8 micrometers to replicate the generated pattern in the SiO.sub.2 growth layer. This method yields a waveguide or similar optical grating device having undulations of extremely low values as determined by SEM photographs of this device.

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Zelmon et al., Appl. Phys. Letters, vol. 42, No. 7, Apr. 1983, pp. 565-566.
Chen et al., IEEE Transactions on Electron Devices, vol. Ed-25, No. 2, Feb. 1978, pp. 267-270.
R. G. Hibberd, "Integrated Circuits a Basic Course for Engineers and Technicians", Texas Instrument Incorporated, 1969, pp. 33-34.

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