Semiconductor circuit including non-ESD transistors with reduced

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257360, 257627, H01L 2362, H01L 2904

Patent

active

058148647

ABSTRACT:
A plurality of transistors according to the present invention formed on a semiconductor wafer including a plurality of non-ESD transistors, the plurality of non-ESD transistors including spacer regions and impurity implant regions encroaching the spacer regions, and a plurality of ESD transistors, the plurality of ESD transistors formed at a predetermined angular offset from the non-ESD transistors. Further, the plurality of ESD transistors include the spacer regions and impurity implant regions encroaching the spacer regions further than the impurity implant regions of the non-ESD transistors.

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