Semiconductor device including a capacitor responsible for a pow

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257315, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

058148507

ABSTRACT:
A semiconductor device has a memory cell array and a filtering capacitor for suppressing noise in a power supply voltage to the device, both formed with one and the same semiconductor substrate. The memory cell array includes memory cells each having a transfer transistor and an information storage capacitor. The transistor of each memory cell has a pair of source/drain regions formed in an active region defined by first isolation regions in a main surface of the semiconductor substrate. Lead electrodes are formed on the source/drain regions. The information storage capacitor of each cell has a lower electrode formed in an electrical connection with a first one of the pair of source/drain regions, a dielectric film and an upper electrode formed on the dielectric film. The filtering capacitor is formed on a second isolation region also formed at the main surface of the semiconductor substrate and has a dielectric layer including an oxide film and a nitride film. The second isolation region has a structure substantially identical with that of the first isolation regions and is arranged at the same film-formation-step level as that of the first isolation regions.

REFERENCES:
patent: 5223730 (1993-06-01), Rhodes et al.
patent: 5442270 (1995-08-01), Kanehachi

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