Circuit for synchronizing asynchronous inputs using dual edge lo

Details Circuit for synchronizing asynchronous inputs using dual edge lo Circuit for synchronizing asynchronous inputs using dual edge lo

1998-06-12

2000-02-29

Tokar, Michael

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

326 46, H03K 190175

Patent

active

06031396&

ABSTRACT:
A synchronizing circuit processes a plurality (N) of input signals to generate a synchronizing circuit output signal, and provides the synchronizing circuit output signal synchronous to a system clock, wherein the N input signals are asynchronous to the system clock. Input stage circuitry samples the N asynchronous input signals. Combinatorial logic circuitry receives and combines the sampled asynchronous input signals to generate the synchronizing circuit output signal. First polarity edge flip flop circuitry to receive, as first polarity edge flip flop input, a first output of at least a first portion of the combinatorial logic circuitry, wherein the first polarity edge flip flop circuitry processes the first polarity edge flip flop input responsive to a first polarity edge of the system clock signal to provide a first polarity edge processed output signal. Second polarity edge flip flop circuitry to receive, as second polarity edge flip flop input, the second polarity edge processed output signal and to process the second polarity edge flip flop input responsive to a second polarity edge of the system clock signal to provide a second polarity edge processed output signal. The combinatorial logic circuitry includes a second portion to process at least the second polarity edge processed output signal to generate the synchronizing circuit output signal.

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