Vertical double diffused MOSFET having a low breakdown voltage a

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257339, 257341, H01L 2976, H01L 2994

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054081181

ABSTRACT:
A vertical double diffused MOSFET includes a gate electrode formed with a plurality of first open windows and at least one second open window connecting two of the first open windows. The first open windows are of a desired polygonal shape and have centers at lattice points of a square lattice provided in a first direction and a second direction orthogonal to the first direction with predetermined interval. The second open window takes in the form of slit having a predetermined width and arranged on a line connecting the center of one first open window to the center of at least one of four other first open windows obliquely adjacent to the one first open window. With the provision of the second open window, the channel width per unit area becomes wider than for a gate electrode having only the first open windows, resulting in a reduced on-resistance.

REFERENCES:
patent: 4561003 (1985-12-01), Tihanyi et al.
patent: 5008725 (1991-04-01), Lidow et al.
patent: 5016066 (1991-05-01), Takahashi
IEEE Transaction on Electron Devices, vol. ED-27, No. 2, Feb. 1980, "Modeling of the On-Resistance of LDMOS, VDMOS, and VMOS Power Power Transistors" by Sun et al., pp. 356-367.

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