Semiconductor element and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257344, 257365, 257366, 257412, 257413, 257900, 257920, 437 21, 437 40, 437 43, 437 50, 437189, 437195, 437225, H01L 2976, H01L 21265

Patent

active

056001681

ABSTRACT:
This invention relates to MOS transistors and a method for fabricating the MOS transistors having LDD (Lightly Doped Drain) structures, which comprises a first conduction type semiconductor substrate, a second conduction type high density source and drain regions formed spaced from each other in the first conduction type semiconductor substrate, a second conduction type low density impurity region formed on sides facing each other of, and adjacent to the second conduction type high density source and drain regions, a first gate insulation film formed on both ends of a upper part of the semiconductor substrate region between the second conduction type low density impurity region, a second gate insulation film formed on upper part of the semiconductor substrate region between the first gate insulation films, a first conduction layer in a form of side wall spacer formed on the first gate insulation film, a second conduction layer formed on the second gate insulation film, a third conduction layer formed on the first conduction layer and the second conduction layer, insulation film side wall spacers formed on sides of the first conduction film and the third conduction layer, and a punch through prevention region formed in a semiconductor substrate region beneath the second gate insulation film.

REFERENCES:
patent: 5027185 (1991-06-01), Liauh
patent: 5047816 (1991-09-01), Cuevas

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