Method for forming capacitor in trench of semiconductor wafer by

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437 24, 437 38, 437919, 148DIG14, 148DIG106, 148DIG118, H01L 2170

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051837757

ABSTRACT:
An improved process for formation of a capacitor in a trench formed in a semiconductor wafer is disclosed. The improved process comprises selectively implanting oxygen through the bottom surface of the trench into the region of the wafer adjacent the bottom surface of the trench and through the surfaces at the top corners of the trench into regions of the wafer adjacent such surfaces at the top corners of the trench using a plasma formed in a plasma-assisted etching apparatus while maintaining a high negative DC bias on the wafer being implanted. Subsequent growth of oxide on the surfaces of the trench will cause the implanted oxygen to form additional oxide in the implanted regions of the wafer adjacent the bottom surface of the trench and adjacent the surface at the top corners of the trench to compensate for the lower oxide growth rates in these areas.

REFERENCES:
patent: 4376672 (1983-03-01), Wang et al.
patent: 4401054 (1983-08-01), Matsuo et al.
patent: 4578589 (1986-03-01), Aitken
patent: 4784720 (1988-11-01), Douglas
patent: 4794434 (1988-12-01), Pelley, III
patent: 4903189 (1990-02-01), Ngo et al.
patent: 4931409 (1990-06-01), Nakajima et al.
patent: 4941026 (1990-07-01), Temple
Silicon Processing for the VLSI Era, vol. II; Wolf 1986; pp. 51-56 and pp. 600-602.
Inspec. Abstract A89105190; B89065468; Shimada et al.
Inspec. Abstract B88013146; Hartney et al.
Inspec. Abstract A90058879; B90032413; Torii et al.
Inspec. Abstract; Torii et al.; Title: Very high current ECR ion source for an oxygen ion implanter.
A high current density and long lifetime ECR source for oxygen implanters; Torii et al.; Present. Jul. 10, 1989; pp. 253-255; vol. 61; No. 1.
Oxygen reactive ion etching for multilevel lithography; Hartney et al.; SPIE vol. 771; 1987; pp. 353-357.
Kao, Dah-Bin et al, "Two-Dimensional Thermal Oxidation of Silicon-I. Experiments", IEEE Transactions on Electron Devices, vol. Ed-34, No. 5, May, 1987, pp. 1008-1017.
Kao, Dah-Bin et al, "Two-Dimensional Thermal Oxidation of Silicon-II. Modeling Stress Effects in Wet Oxides", IEEE Transactions on Electron Devices, vol. Ed-35, No. 1, Jan., 1988, pp. 25-37.
Sinclair, R. et al, "A High Resolution Electron Microscopy Study of the Fine Structure in a Trench Capacitor", Journal of Electrochemical Society, vol. 136, No. 2, Feb., 1989, pp. 511-518.

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