Semiconductor memory device having test pattern generating circu

Details Semiconductor memory device having test pattern generating circu Semiconductor memory device having test pattern generating circu

1986-08-11

1989-04-11

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Testing

371 21, 324 73AT, G11C 700

Patent

active

048212385

ABSTRACT:
A semiconductor memory device comprises an internal circuit including a memory circuit; a test pattern generating circuit; an element for receiving external signals supplied from the outside; and an input switching circuit connected between the test pattern generating circuit and the receiving element, for switching the input supplied to the internal circuit between output signals generating from the test pattern generating circuit and the external signals, the output signals generated from the test pattern generated circuit being input to the internal circuit through the input switching circuit in a test mode, the external signals being input to the internal circuit through the input switching circuit in a usual mode; the test pattern generating circuit, the input switching circuit, and the internal circuit being provided on the same chip.

REFERENCES:
patent: 3805152 (1974-04-01), Ebersman et al.
patent: 3961252 (1976-06-01), Eichelberger
patent: 4379259 (1983-04-01), Varadi et al.
patent: 4384348 (1983-05-01), Nozaki
patent: 4553225 (1985-11-01), Ohe

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