Complementary MIS transistor and a fabrication process thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257336, 257344, 257408, 257653, H01L 2702, H01L 2910

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active

053348702

ABSTRACT:
A CMIS transistor suitable for device miniaturization, elimination of degradation of operational characteristics by hot carrier effect, and elimination of decrease of threshold voltage caused by short channel effect, includes a laterally spreading N-type diffusion region having an impurity concentration level higher than P-type and N-type wells but lower than source and drain regions, such that the N-type diffusion region extends laterally into a part located immediately below an edge of an insulating gate and has a depth smaller than a depth of the source and drain regions. The device is thereby capable of increasing the width of depletion layer at the bottom of the source and drain regions while maintaining effectiveness as a punch-through stopper. Thereby, the junction capacitance at the source and drain regions is reduced and the operational speed of the device improved in the P-channel transistor part in the device. In the N-channel transistor part, an effective suppression of punch-through is achieved because of the small diffusion depth of the N-type diffusion region. Thereby, the decrease of threshold voltage caused by the short channel effect is effectively eliminated even when the gate length of the transistor is reduced.

REFERENCES:
patent: 4924277 (1990-05-01), Yamane et al.
patent: 5061975 (1991-10-01), Inuishi et al.
patent: 5122474 (1992-06-01), Harringon, III
patent: 5170232 (1992-12-01), Narita
patent: 5216272 (1993-06-01), Kubokoya et al.
patent: 5247198 (1993-09-01), Homma et al.
patent: 5247199 (1993-09-01), Matlock

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