Dual ion implantation process for gate oxide improvement

Details Dual ion implantation process for gate oxide improvement Dual ion implantation process for gate oxide improvement

1996-12-16

1998-02-03

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257411, 437241, H01L 2102, H01L 2976

Patent

active

057147884

ABSTRACT:
A method for improving oxide quality by implanting both nitrogen and fluorine ions into the oxide layer through a polysilicon layer to prevent the penetration of impurities into the oxide layer is described. A layer of gate silicon oxide is grown over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the gate silicon oxide layer. Fluorine ions are implanted through the polysilicon layer wherein the fluorine ions congregate at the interface between the gate silicon oxide layer and the surface of the semiconductor substrate. Thereafter, nitrogen ions are implanted through the polysilicon layer wherein the nitrogen ions congregate at the interface between the gate silicon oxide layer and the surface of the semiconductor substrate. The substrate is annealed. The polysilicon and gate silicon oxide layers are patterned to form gate electrodes and interconnection lines. Source/drain ions are implanted to form source and drain regions within the semiconductor substrate using the gate electrodes and interconnection lines as a mask. Metallization with electrical connections completes the fabrication of the integrated circuit device.

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AB. Joshi, "Suppressed Process-Induced Damage in N.sub.2 O-annealed SiO.sub.2 Gate Dielectrics", IEEE-IRPS, 1995, pp. 156-161.

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