Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-04-18
1999-10-12
Martin-Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257315, 257319, 257320, 438257, 438587, 36518514, H01L 2978, H01L 2701, H01L 2910, H01L 2940
Patent
active
059659130
ABSTRACT:
A memory array of PROM, EPROM or EEPROM cells has each cell formed in a trench of a thick oxide layer deposited on a silicon substrate, in a manner that a significant portion of opposing areas of the floating gate and control gate of each cell which provide capacitive coupling between them are formed vertically. This allows the density of the array to be increased since the amount of semiconductor substrate area occupied by each cell is decreased without having to sacrifice the amount or quality of the capacitive coupling. Further, a technique of forming capacitive coupling between the floating gate and an erase gate in a flash EEPROM array cell with improved endurance is disclosed.
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Guterman Daniel C.
Harari Eliyahou
Samachisa Gheorghe
Yuan Jack H.
Martin-Wallace Valencia
SanDisk Corporation
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