Read circuit for memory

Details Read circuit for memory Read circuit for memory

1988-01-25

1990-01-23

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

365204, 365185, G11C 700

Patent

active

048962988

ABSTRACT:
A read circuit is disclosed for logic circuit type integrated circuits comprising a memory consisting of a matrix of memory cells. The memory cells are each addressable by rows and columns selected by row and column decoders. The read circuit, which is connected to the memory cells by a line called a bit line, comprises a pre-loading circuit for the bit line and a detection circuit that detects the discharging or non-discharging of the bit line depending on whether the memory cell selected is in the state "0" or "1", and also comprises a means to memorize the state that is read. The circuit further comprises means which make it possible, in read mode, to discharge the bit line regardless of whether the memory cell is in the state "1" or "0" and means that delay the moment of discharge. The invention can be applied to EPROMs or similar memories.

REFERENCES:
patent: 4475178 (1984-10-01), Kinoshita
patent: 4545038 (1985-10-01), Bellay et al.

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