Non-volatile semiconductor memory cell array

Details Non-volatile semiconductor memory cell array Non-volatile semiconductor memory cell array

1995-11-29

1998-04-14

Levy, Stuart S.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, 257298, H01L 29788, H01L 2976, H01L 2994, H01L 31119

Patent

active

057395667

ABSTRACT:
The present invention provides a floating gate electrode structure in a non-volatile semiconductor memory device. The floating gate electrode comprises a base portion, a contact portion and a head portion. The base portion horizontally extends on a first gate insulation film so as to be positioned over a channel region of a semiconductor substrate. The contact portion upwardly extends from the base portion. The contact portion is provided within a vertical contact hole formed in an inter-layer insulator covering the base portion. The inter-layer insulator encloses bit lines. The bit lines are positioned above the base portion and electrically separated by the inter-layer insulator from both the contact portion and the base portion. The head portion horizontally extends on the inter-layer insulator to be in contact with the contact portion so that the head portion is electrically coupled to the base portion via the contact portion. The head portion is in contact with and underlies a second gate insulation film. The gate insulation film is in contact with and underlies a control electrode. The head portion is electrically separated by the inter-layer insulator from the bit lines. The area of a first interface between the base portion and the first gate insulation film is smaller than the area of a second interlace between the head portion and the second gate insulation film.

REFERENCES:
patent: 4811078 (1989-03-01), Tigelaar et al.
patent: 4868619 (1989-09-01), Mukherjee et al.
patent: 5051794 (1991-09-01), Mori
patent: 5315142 (1994-05-01), Acovic et al.
patent: 5331188 (1994-07-01), Acovic et al.
patent: 5341026 (1994-08-01), Harada et al.

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