Semiconductor memory circuit with sensing arrangement free from

Details Semiconductor memory circuit with sensing arrangement free from Semiconductor memory circuit with sensing arrangement free from

Filed on

1988-11-30

Date issued

1990-05-15

Examiner

Hecker, Stuart N.

Patent Class

Static information storage and retrieval

SubClass

Read/write circuit

Other Related Categories

365210, 365207, 365233, G11C 700, G11C 1142

Type

Patent

Status

active

Patent number

049263811

Description

ABSTRACT:
A dynamic memory circuit which can operate at a high speed and with a reduced amount of noise is disclosed. The memory circuit includes word lines and a pair of dummy word lines arranged in rows, a plurality of bit lines pairs arranged in columns, a plurality of memory cells, dummy capacitors connected between the dummy word lines and the bit line pairs and a plurality of transfer gate pairs inserted between the bit line pairs and the sense amplifiers.

REFERENCES:
patent: 4393475 (1983-07-01), Kitagawa et al.
patent: 4760562 (1988-07-01), Ohtani et al.
patent: 4777625 (1988-10-01), Sakui et al.

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