Semiconductor integrated circuit device having digit line biasin

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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365203, G11C 700

Patent

active

053532520

ABSTRACT:
A semiconductor integrated circuit device includes a plurality of digit lines, a plurality of memory cells, a sense amplifier circuit, a plurality of digit line biasing circuits, and a bias voltage generating circuit. Non-selected digit lines are biased to a predetermined voltage by the bias voltage generating circuit and the digit line bias circuits during the read-out mode, which results in the advantage that the speed in which the selected digit line is charged to the equilibrium values is high, hence the operation speed of the circuit is high. The present invention may be effectively embodied in such an EEPROM which is large in capacity or scale and which requires a high speed operation.

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