Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent
1999-09-17
2000-08-22
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
257738, 257778, 257786, H01L 2348
Patent
active
061076856
ABSTRACT:
Disclosed is a semiconductor part improved to enhance the connection strength of land terminals upon mounting of the semiconductor part and to give a sufficient margin to the arrangement pitch of wires passing through the land terminals, a fabrication method thereof, and a structure and method of mounting the semiconductor part. The semiconductor part includes land terminals for bumps (or land terminals provided with bumps), arranged in a grid pattern, which are connected to surfaces of electrode pads via re-arrangement wires on a base; wherein the land terminals for bumps (or land terminals provided with bumps) are classified into outer land terminals arranged on the outer peripheral side of the base and inner land terminals arranged inside the outer land terminals; and the outer land terminals each have a diameter larger than that of each of the inner land terminals and/or have a pitch larger than an arrangement pitch of the inner land terminals.
REFERENCES:
patent: 5686699 (1997-11-01), Chu et al.
patent: 5828128 (1998-10-01), Higashiguchi et al.
patent: 5874776 (1999-02-01), Kresge et al.
patent: 5977617 (1999-11-01), Kata
Cruz Lourdes
Hardy David
Sony Corporation
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