Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-01-27
2000-08-22
Gorgos, Kathryn
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438687, 438692, 427 98, 427 99, 427250, 4274301, 4274431, 205 95, 205103, 205104, 205118, 205123, 205125, H01L 214763
Patent
active
061071862
ABSTRACT:
Erosion of high density metallization areas associated with conventional damascene-CMP processing is avoided and greater planarity achieved by selectively increasing the metal overburden layer thickness at high density metallization regions. Embodiments include initially filling recesses formed in the substrate surface with a metal forming a blanket or overburden layer of the metal thereon. Regions of the blanket or overburden layer overlying regions of high density metallization are selectively electroplated to a greater thickness. The surface is then planarized by CMP, with the selectively increased thickness areas of the overburden layer compensating for greater erosion rates thereat during CMP, thereby resulting in greater planarity of the polished surface.
REFERENCES:
patent: 4789648 (1988-12-01), Chow et al.
patent: 5503882 (1996-04-01), Dawson
patent: 5928960 (1999-07-01), Greco et al.
Advanced Micro Devices , Inc.
Gorgos Kathryn
Keehan Christopher M.
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