Interconnect structure with an integrated low density dielectric

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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257760, H01L 2147, H01L 21471, H01L 23532

Patent

active

057478805

ABSTRACT:
This invention provides a semiconductor device and process for making the same with dramatically reduced capacitance between adjacent conductors and an interlayer dielectric construction which emphasizes mechanical strength, etch compatibility, and good heat transfer. This process can include applying a solution between conductors 24, and then gelling, surface modifying, and drying the solution to form an extremely porous dielectric layer 28. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric and provide mechanical strength, heat transfer, and a solid layer for via etch. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.

REFERENCES:
patent: 4017528 (1977-04-01), Unger et al.
patent: 4141055 (1979-02-01), Berry et al.
patent: 4619839 (1986-10-01), Lehrer
patent: 4652467 (1987-03-01), Brinker et al.
patent: 4885262 (1989-12-01), Ting et al.
patent: 4987101 (1991-01-01), Kaanta et al.
patent: 5023208 (1991-06-01), Pope et al.
patent: 5079188 (1992-01-01), Kawai
patent: 5103288 (1992-04-01), Sakamoto et al.
patent: 5104828 (1992-04-01), Morimoto et al.
patent: 5155576 (1992-10-01), Mizushima
patent: 5270267 (1993-12-01), Ouellet
patent: 5352630 (1994-10-01), Kim et al.
patent: 5354713 (1994-10-01), Kim et al.
Patent Abstracts of Japan, vol. 012, No. 498 (E698) 24 Dec. '88.
U.S. Serial No. 08/137,658, Filed Oct. 15, 1993.
U.S. Serial No. 08/250,137, Filed May 27, 1994.
Silicon Processing for The VLSI Era, vol. II: Process Integration, Stanley Wolf PhD, pp. 222-239.
U.S. Serial No. 08/234,100, Filed Apr. 28, 1994.
U.S. Serial No. 08/234,099, Filed Apr. 28, 1994.

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