Method and apparatus for reducing bus noise and power consumptio

Details Method and apparatus for reducing bus noise and power consumptio Method and apparatus for reducing bus noise and power consumptio

1995-06-06

1996-11-12

Harvey, Jack B.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 26, 341141, G06F 132

Patent

active

055749216

ABSTRACT:
In a computer system comprising a plurality of subsystems, interconnected by a bus comprising bit drivers and bit receivers, data words are transmitted on the bus in the form of code words. The code words are formulated such that the number of bits of the bus which changes with the transmission of successive code words is minimized. A switching code, comprising one or more bits, defines a plurality of napping codes and a data word to be transmitted is mapped by use of the mapping codes to a plurality of code words. One of the plurality of code words differing from a previously transmitted code word in the least number of bit positions is selected. The selected code words is transmitted, together with a switching code, identifying the mapping from which the transmitted code word was generated. At the receiving end of the bus, the switching code is decoded to identify the mapping used in creating the code word. Using the identified mapping, the original data word is recovered.

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