Semiconductor integrated circuit device, method for manufacturin

Details Semiconductor integrated circuit device, method for manufacturin Semiconductor integrated circuit device, method for manufacturin

1996-09-06

1998-05-05

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257318, 257321, H01L 29788

Patent

active

057478473

ABSTRACT:
A semiconductor integrated circuit device having a SOI structure which can prevent a deterioration in the breakdown voltage of a transistor without damaging integration, and a method for manufacturing the semiconductor integrated circuit device are obtained. An embedded oxide film is not formed over the whole face of a P type silicon layer but has an opening in a region which is placed below a gate electrode. The opening is filled in to form a penetration P layer. Accordingly, a SOI layer is electrically connected to the P type silicon layer through the penetration P layer. The plane position and shape of the gate electrode conform to those of the penetration P layer.

REFERENCES:
patent: 4619034 (1986-10-01), Janning
patent: 5488243 (1996-01-01), Tsuruta et al.
patent: 5497019 (1996-03-01), Mayer et al.
patent: 5604368 (1997-02-01), Taur et al.
International Electron Device Meeting, pp. 475-478, 1993, T. Iwamatsu, et al., "CAD-Compatible High-Speed CMOS/SIMOX Technology Using Field-Shield Isolation for 1M Gate Array".

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