Test facility for error diagnosis in multi-computer systems, par

Details Test facility for error diagnosis in multi-computer systems, par Test facility for error diagnosis in multi-computer systems, par

1980-06-19

1982-06-08

Atkinson, Charles E.

Excavating

324 73R, 371 17, 364900, G01R 3128, G06F 1100

Patent

active

043343082

ABSTRACT:
A test facility is disclosed for error diagnosis in multicomputer systems, particularly in multi-microcomputer systems in which signal voltages on the system bus in the error diagnosis are made perceptible as optical signals by display devices directly controlled by the signal voltages. A decoupling device is provided for connecting an evaluation/control logic to the system bus and an address/data information display device, an access signal display device, a bus control signal display device and an interrupt signal display device are provided. At least one comparator module is provided whose first group of signal inputs receives a binary information corresponding to a selection address, adjustable by means of a selection switch, and whose second group of signal inputs receive information concerning the address line of the system bus. The comparator module, given equality of the binary information corresponding to the selection address and an occurring address information, emits an output signal to provide an access signal simultaneously occurring on an access signal bus line which is switched on for the test facility by way of at least one logic element. The address data information display device is released by an access signal switched on in such a manner and the access signal display device and the interrupt signal display device contain display elements of a first group for rendering perceptible the momentary states of all access signal bus lines and of all interrupt signal lines, and respectively contain a second group of display means for rendering perceptible the access signal and/or interrupt signal which was respectively most recently active.

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Greenwood, Text Step Sequencer and Scope Multiplexer Controller, IBM Technical Disclosure Bulletin, vol. 22, No. 3, Aug. 1979, pp. 1178-1179.
Cukier et al., Test Device for Microprocessor Programming, IBM Technical Disclosure Bulletin, vol. 21, No. 10, Mar. 1979, pp. 4076-4077.

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