Non-volatile semiconductor memory device

Static information storage and retrieval – Read/write circuit

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Details

365236, 365233, 36523006, G11C 1604

Patent

active

056173610

ABSTRACT:
A non-volatile semiconductor memory (flash memory) has a row selection section for selecting a word line for a row of a memory transistor in a programming period and a column section section for selecting a plurality of bit lines in cyclic order in the programming period, so that the writing control section programs the memory transistors arranged in the row in one programming period. The length of time for programming the memory transistors in each of the columns is set precisely at a first period. The resultant threshold voltage of the memory transistors programmed in this way has a reduced variation among the memory transistors, so that a reliable programming can be effected.

REFERENCES:
patent: 4985867 (1991-01-01), Ishii et al.
patent: 5361227 (1994-11-01), Tanaka et al.
T. Takeshima et al.; "TA 8.6: A 3.3 V Single-Power-Supply 65Mb Flash Memory with Dynamic Bit-Line Latch (DBL) Programming Scheme"; ISSCC94/Session 8, Paper TA 8.6; 1994 IEEE International Solid-State Circuits Conference; pp. 148-149.

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