Method of forming landing plugs for PMOS and NMOS

Details Method of forming landing plugs for PMOS and NMOS Method of forming landing plugs for PMOS and NMOS

1998-03-03

2000-07-11

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438643, 438644, 438647, 438648, 438675, H01L 2122, H01L 21285

Patent

active

060872535

ABSTRACT:
Contact holes are formed in a dielectric layer. An undoped polysilicon layer is formed on the dielectric layer and along the surface of the contact holes. A first photoresist is patterned on the dielectric layer to cover a region for forming P+ contact. Then, an ion implantation is carried out. A second photoresist is formed over the n conductivity type impurity regions in the cell area and the n+ conductive type impurity region in peripheral area. An ion implantation is then performed to dope ions into the substrate to form a p+ conductivity type impurity region in the peripheral area for PMOS. A titanium layer and a titanium nitride layer are respectively formed on the surface of the contact holes. Subsequently, a tungsten layer is refilled in to the contact holes. An etching back process or chemical mechanical polishing (CMP) is employed to removed a portion of the tungsten layer to form a plurality of tungsten plugs.

REFERENCES:
patent: 5591672 (1997-01-01), Lee et al.
patent: 5624863 (1997-04-01), Helm et al.

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