Semiconductor device having E.sup.2 PROM and EPROM in one chip

Details Semiconductor device having E.sup.2 PROM and EPROM in one chip Semiconductor device having E.sup.2 PROM and EPROM in one chip

1990-10-10

1993-04-06

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

365185, H01L 2968, G11C 1134

Patent

active

052006360

ABSTRACT:
An E.sup.2 PROM and an EPROM are formed on the same substrate. An E.sup.2 PROM memory cell has a floating gate and a control gate. A tunnel insulating film is formed between the floating gate and source/drain regions, thereby constituting a memory cell of an "FLOTOX" type. An EPROM memory cell has a floating gate and a control gate, thus constituting a memory cell of an "SAMOS" type.

REFERENCES:
patent: 4393474 (1983-07-01), McElroy
patent: 4597159 (1986-07-01), Usami et al.
patent: 4613956 (1986-09-01), Paterson et al.
patent: 4833096 (1989-05-01), Huang et al.
patent: 4868619 (1989-09-01), Mukherjee et al.
patent: 4990979 (1991-02-01), Otto
patent: 5099451 (1992-03-01), Sourgen et al.

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