Output synchronization method and apparatus in a memory system u

Details Output synchronization method and apparatus in a memory system u Output synchronization method and apparatus in a memory system u

1996-12-11

2000-02-22

Thai, Tuan V.

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

711100, 711154, G06F 1300

Patent

active

060292342

ABSTRACT:
The present invention provides an output synchronization method and apparatus in which an appropriate amount of data can be stored in a buffer memory all the time by detecting a change in output speed of data outputted from the buffer memory and a large amount of data can be handled with a small buffer size. According to the present invention, a change in the output speed of data outputted from a buffer memory, from which data is read and outputted at a time when it is required after input data is stored, is measured, and data inputted to the buffer memory is controlled according to the change in the output speed.

REFERENCES:
patent: 4719563 (1988-01-01), Kosuge et al.
patent: 5161215 (1992-11-01), Kouda et al.
patent: 5329538 (1994-07-01), Kawano et al.
patent: 5502672 (1996-03-01), Kwon
patent: 5535171 (1996-07-01), Kim et al.
patent: 5557575 (1996-09-01), Lee
patent: 5638535 (1997-06-01), Rosenthal et al.
patent: 5696990 (1997-12-01), Rosenthal et al.

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