Semiconductor memory

Static information storage and retrieval – Addressing

Patent

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365189, G11C 700

Patent

active

044751818

ABSTRACT:
A semiconductor memory of multiplexed address inputs is made operative to receive column addresses and row addresses through common external address lines and to decode them consecutively in response to first and second strobe signals thereby to select one of memory cells. The semiconductor memory is equipped with address buffers exclusively for column and row addressing operations, respectively, the outputs of which are consecutively transmitted to column decoders and row decoders through common internal address lines.

REFERENCES:
patent: 4247921 (1981-01-01), Itoh et al.

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