Process for forming self-aligned complementary source/drain regi

Details Process for forming self-aligned complementary source/drain regi Process for forming self-aligned complementary source/drain regi

1982-07-12

1984-10-02

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148187, 29571, 357 42, 357 91, H01L 21265

Patent

active

044746245

ABSTRACT:
Improved CMOS processing steps for forming p-type and n-type source and drain regions. A photoresist mask is used to expose one transistor type to allow the formation of source and drain regions of a first conductivity type. Then an oxidation step is used to grow an oxide over the substrate; this oxide grows more quickly over the doped source and drain regions. Ion implantation is used to implant ions of the second conductivity type through the thin oxide while the thicker oxide blocks these ions. Thus, the complementary source and drain regions are formed with a single masking step and without counter doping.

REFERENCES:
patent: 3891468 (1975-06-01), Ito et al.
patent: 3902926 (1975-09-01), Perloff et al.
patent: 4019247 (1977-04-01), Borel et al.
patent: 4217149 (1980-08-01), Sawazaki
patent: 4236167 (1980-11-01), Woods
patent: 4274891 (1981-06-01), Silvestri et al.
patent: 4277291 (1981-07-01), Cerofolini et al.

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