Method to fabricate a dual metal-damascene structure in a substr

Details Method to fabricate a dual metal-damascene structure in a substr Method to fabricate a dual metal-damascene structure in a substr

1998-06-22

2000-02-22

Tsai, Jey

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438624, 438627, 438628, 438629, 438633, 438634, 438637, 438638, 438639, 438643, 438644, 438653, 438654, 438666, 438667, 438668, 438672, H01L 214763

Patent

active

06027994&

ABSTRACT:
A method to fabricate a dual damascene structure in a substrate is disclosed in the present invention. A first silicon oxide layer is deposited over the substrate and a silicon nitride layer is formed on the first silicon oxide layer. The first silicon oxide layer and the silicon nitride layer are etched in order to form a via hole on the substrate. Afterwards, a second silicon oxide layer is deposited to refill into the via hole and to cover the silicon nitride layer. A dry etching process is performed to remove the second silicon oxide layer in the via hole and to form a metal trench in the second silicon oxide layer on the silicon nitride layer and a metal trench in the second silicon oxide layer above the via hole. After the formation of the metal trenches, a portion of the second silicon oxide layer is remained on the sidewalls and the bottom of the via hole. A dry etching process is performed to remove the remaining portion of the second silicon oxide layer. At last, metal material is deposited to refill into the via hole and the metal trench, it is followed by the metal CMP processs to remove the excess metal over the silicon oxide. The dual metal-damascene structure on the substrate is complete.

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patent: 5759911 (1998-06-01), Cronin et al.
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