Process for the separation of monolithic LED chip arrangements g

Details Process for the separation of monolithic LED chip arrangements g Process for the separation of monolithic LED chip arrangements g

1989-08-04

1990-05-29

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156656, 156657, 1566591, 156662, 437226, H01L 21306, B44C 122, C23F 102, C03C 1500

Patent

active

049293001

ABSTRACT:
LED chip arrangements fabricated monolithically on a semiconductor substrate wafer are to be separated from one another by scribing in such a way that they can be properly arrayed to obtain a tight image-dot grid over several LED chip arrangements. The metallization of the back side of the semiconductor substrate wafer is exposed in the area of a prescribed separation track. Prior to the separation, a depression is etched into the back side of the semiconductor substrate wafer.
The process according to the invention is particularly useful in the manufacture of high-resolution LED arrays.

REFERENCES:
patent: 4237601 (1980-12-01), Wodhouse et al.
Patent Abstracts of Japan, vol. 9, No. 136 (E-320), (1859), Jun. 12, 1985, Abstract No. 60-20590 (A).
Standard European Search Report; Feb. 13, 1989; 3 pages.

Affiliated with

Also associated with

Rating

Process for the separation of monolithic LED chip arrangements g does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for the separation of monolithic LED chip arrangements g, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for the separation of monolithic LED chip arrangements g will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-518956