Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1992-06-03
1994-04-05
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 36523006, G11C 700
Patent
active
053011538
ABSTRACT:
A redundant array element or signal line is selectively added and an defective array element or signal line is eliminated by the method and apparatus of the present invention. A multiplexor receives an input signal and a neighboring input signal and outputs one of these two input signals in response to a control signal. A fuse is provided in connection with each output line and configured such that if the fuse is unblown, the device selects the same input as was selected by its upstream neighbor. If a fuse if blown, the multiplexor will select the second input and will output a control signal to its downstream neighbor causing the downstream neighbor to also output its second input line and to output a control signal to its downstream neighbor to select the second input line. The substitution of a redundant element or line is achieved by blowing a single fuse and the circuitry adds only a single mux delay to the critical path.
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patent: 4689494 (1987-08-01), Chen et al.
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patent: 4847810 (1989-07-01), Tagami
patent: 5038368 (1991-08-01), Lee
Hoang Huan
LaRoche Eugene R.
MIPS Computer Systems, Inc.
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