Apparatus and method for calculating an erasure time for data st

Details Apparatus and method for calculating an erasure time for data st Apparatus and method for calculating an erasure time for data st

1996-02-20

1999-12-21

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711102, 36518514, 36518529, 3651853, 36518533, 365218, 39580037, 39580039, G06F 944, G06F 1578

Patent

active

060063041

ABSTRACT:
A system includes a microcomputer. The microcomputer includes a clock signal circuit, a measuring circuit, a central processing unit, and a flash memory. A user sets a frequency of a clock signal provided by the clock signal circuit. The measuring unit counts a number of cycles of the clock signal in a period specified by reference data. The central processing unit receives the clock signal from the clock signal circuit and operates in accordance with the clock signal. The flash memory stores data which is electrically erased during an erase operation. The erase operation is executed during an erase time which includes a number of cycles of the clock signal calculated by the central processing unit. The central processing unit calculates a time for one cycle of the clock signal as a function of the period specified by the reference data and the number of cycles counted by the measuring unit. The central processing unit then calculates the number of cycles of the clock signal to be allocated as the erase time as a function of the time for one cycle of the clock signal.

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patent: 5446904 (1995-08-01), Belt et al.
patent: 5581503 (1996-12-01), Matsubara et al.
patent: 5687345 (1997-11-01), Matsubara et al.

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