Static information storage and retrieval – Read/write circuit
Patent
1993-05-11
1994-08-23
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
36518905, 36523005, 36523009, 3652385, 365218, G11C 700, G11C 800
Patent
active
053413326
ABSTRACT:
A semiconductor memory device having flash write mode and initialized mode functions includes a flash write signal generation circuit for generating flash write signals FW and /FW, and a plurality of switching circuits 30 each provided corresponding to one row in a memory cell arrays MA. The switching circuit 30 applies fixed data "0" or "1" to a memory cell connected to one row selected by a row decoder 10, in response to the flash write signal FW or /FW. Because it is not necessary to activate a column decoder when the flash write or the initialized mode operation is conducted, writing speed can be increased while power consumption can be reduced.
REFERENCES:
patent: 5003510 (1991-03-01), Kamisaki
patent: 5134589 (1992-07-01), Hamano
patent: 5140553 (1992-08-01), Choi
patent: 5155705 (1992-10-01), Goto
patent: 5187684 (1993-02-01), Hoshino
patent: 5255243 (1993-10-01), Kitazawa
Inoue Kazunari
Ogawa Toshiyuki
LaRoche Eugene R.
Mai Son
Mitsubishi Denki & Kabushiki Kaisha
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