Semiconductor cell array with high packing density

Details Semiconductor cell array with high packing density Semiconductor cell array with high packing density

1997-11-05

1999-12-21

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257331, 257401, H01L 2976, H01L 31062

Patent

active

060052716

ABSTRACT:
A MOSFET (Metal Oxide Semiconductor Field Effect Transistors) cell array formed on a semiconductor substrate includes a major surface formed with a plurality of MOSFET cells. Each semiconductor cell in the cell array is geometrically configured with a base portion and a plurality of protruding portions extending from the base portion. The base and protruding portions define a closed cell boundary enclosing each semiconductor cell. The closed cell boundary of each semiconductor cell is disposed on the major surface proximal to and in geometrical accord with the corresponding cell boundaries of other adjacent semiconductor cells in the cell array. As arranged, the cell boundary and thus the channel width of each cell is extended without any concomitant reduction in cell area.

REFERENCES:
patent: 5136349 (1992-08-01), Yilmaz et al.

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