Semiconductor device with reduced stress on gate electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257327, 257388, 257412, 257633, H01L 2980, H01L 2984, H01L 2904

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active

053410157

ABSTRACT:
In a semiconductor device having a gate electrode and an insulating film covering the gate electrode on a compound semiconductor substrate, the vector sum of the stress in the gate metal and the stress produced by the insulating film on the gate electrode is zero. A production method of a semiconductor device includes producing a gate electrode having the same but opposite stress of an insulating film by sputtering under an adjusted gas pressure a target of WSi.sub.x and depositing an insulating film covering the gate electrode.

REFERENCES:
patent: 3856647 (1974-12-01), Blachman
patent: 4777517 (1988-10-01), Onodera et al.
patent: 4791471 (1988-12-01), Onodera et al.
patent: 5023676 (1991-06-01), Tatsuta
"0.3--.mu.m Advanced Saint FET's Having Asymmetric m.sup.+ -Layers For Ultra-High-Frequency GaAs MMIC's", Enoki et al., IEEE Transactions on Electron Device, 1988, pp. 18-21.
Asbeck et al., "Piezoelectric Efects in . . . Characteristics", IEEE Transactions on Electron Devices, vol. ED-32, No. 11, 1985, 1377-1380.
Onodera et al., "Improvement in GaAs . . . Effect", IEEE Transactions on Electron Devices, vol. ED-32, No. 11, 1985, 2314-2318.
Schnell et al., "Compensating Piezoelectric . . . MESFETs", Japanese Journal of Applied Physics, vol. 26, No. 10, 1987, L1583-L1586.

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