Patent
1990-04-04
1991-11-05
Jackson, Jr., Jerome
357 231, 357 29, 357 55, 357 59, H01L 2968, H01L 2978, H01L 2701, H01L 2900
Patent
active
050634240
ABSTRACT:
The UPROM memory cell comprises self-aligned lines of source and lines of drain obtained in a semiconductor substrate. It also comprises a strip of floating gate, a strip of dielectric and a strip of barrier polysilicon, each of these strips being provided with a respective pair of small lateral fins. The UPROM cell lastly comprises a control gate superimposed over and self-aligned with the floating gate.
REFERENCES:
patent: 4334347 (1982-06-01), Goldsmith et al.
patent: 4597060 (1986-06-01), Mitchell et al.
patent: 4613956 (1986-09-01), Paterson et al.
patent: 4717943 (1988-01-01), Wolf et al.
patent: 4758869 (1988-07-01), Eitan et al.
patent: 4758984 (1988-07-01), Yoshida et al.
patent: 4812885 (1989-03-01), Riemenschneider
patent: 4905062 (1990-02-01), Esquivel et al.
Bellezza Orio
Melanotte Massimo
Jackson, Jr. Jerome
Kim Daniel
SGS--Thomson Microelectronics S.r.l.
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