Sense amplifier for nonvolatile semiconductor storage devices

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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36518909, 365210, G11C 700

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active

052435733

ABSTRACT:
A sense amplifier for nonvolatile semiconductor storage devices, wherein a first reference voltage is generated from a first reference voltage generating circuit and a second reference voltage is generated from a second reference voltage generating circuit. A latch type sense amplifier is provided, which is connected to a bit line via a selection transistor. The latch type sense amplifier includes input/output terminals in two directions and serves to latch information when the input voltage at one input/output terminal is higher than the voltage at the other input/output terminal. A first gate transistor, conductive in response to the second reference voltage, is connected between the output of the first reference voltage generating circuit and the one input/output terminal for the latch type sense amplifier. A second gate transistor, conductive in response to the second reference voltage, is connected between a load and the other input/output terminal of the latch type sense amplifier.

REFERENCES:
patent: 4301518 (1981-11-01), Klaas
patent: 4884241 (1989-11-01), Tanaka et al.
patent: 4933906 (1990-06-01), Terada et al.
patent: 4982364 (1991-01-01), Iwahashi
A 68-ns 4-Mbit CMOS EPROM with High-Noise-Immunity Design, IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990.

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