Bi-CMOS semiconductor integrated circuit

Static information storage and retrieval – Systems using particular element – Semiconductive

Patent

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Details

365174, 36523006, G11C 1140

Patent

active

052435571

ABSTRACT:
Disclosed here in is a semiconductor integrated circuit comprising a substrate, a memory cell array having a plurality of memory cells arranged in rows and columns, a plurality of word lines, and a plurality of bit lines, and a plurality of word-line drive circuits located near the memory cell array. Each of the word-line drive circuits is a Bi-NMOS circuit which comprises a bipolar transistor for pulling up the potential of the word line and an N-channel MOS transistor for pulling down the potential of the word line. The collector layers of the bipolar transistors are formed of one and the same layer.

REFERENCES:
patent: 5136535 (1992-08-01), Scharrer et al.

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