Fabrication of a gate electrode stack using a patterned oxide la

Details Fabrication of a gate electrode stack using a patterned oxide la Fabrication of a gate electrode stack using a patterned oxide la

1997-08-29

1999-08-24

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438778, 438197, 438426, 438697, H01L 213205

Patent

active

059435968

ABSTRACT:
A semiconductor device having a gate electrode stack formed using a patterned oxide layer is disclosed. The device is formed by forming an oxide layer over a surface of a substrate and forming at least one opening in the oxide layer. A high permittivity plug (e.g., a BST plug) is formed in the lower portion of the opening. A conductive plug (e.g., a metal silicide plug) is formed in an upper portion of the opening over the high permittivity plug. Remaining portions of the oxide layer are then removed. The conductive plug and high permittivity plug may form a gate electrode and a gate insulating layer, respectively.

REFERENCES:
patent: 5679599 (1997-10-01), Mehta
patent: 5738731 (1998-04-01), Shindo et al.
patent: 5786256 (1998-06-01), Gardner et al.

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