Micro MIS type FET and manufacturing process therefor

Details Micro MIS type FET and manufacturing process therefor Micro MIS type FET and manufacturing process therefor

1994-04-26

1995-09-05

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257402, 257657, H01L 2910, H01L 2978

Patent

active

054480930

ABSTRACT:
A micro MIS type FET comprises first conductivity type source/drain regions formed in a surface of a semiconductor layer mutually spaced apart by a distance of less than 2 .mu.m, a second conductivity type channel layer having an impurity concentration of less than 1.times.10.sup.16 /cm.sup.3 formed between the source/drain regions to have a depth less than depths of the source/drain regions, and a second conductivity type threshold voltage control region having an impurity concentration of more than 1.times.10.sup.17 /cm.sup.3 beneath the channel layer.

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patent: 5196908 (1993-03-01), Kusunoki et al.
Ko, "Advanced MOS Device Physics", VLSI Electronics Microstructure Science, vol. 18 (1989), pp. 1-9.
Shigyo et al, "Three-Dimensional Analysis of Subthreshold Swing and Transconductance for Fully Recessed Oxide (Trench) Isolated 1/4-.mu.m-Width MOSFET's", IEEE Transactions on Electron Devices, vol. 35, No. 7 (1988), pp. 945-951.
Chen, "Current Trends in MOS Process Integration", VLSI Electronics Microstructure Science, vol. 18 (1989), pp. 85-89.
Arora et al, "MOSFET Modeling for Circuit Simulation", VLSI Electronics Microstructure Science, vol. 18 (1989), pp. 237-245.
Grove, "Theory of Semiconductor Surfaces" and Characteristics of Surface Space-Charge Regions, Physics and Technology of Semiconductor Devices, (1967), pp. 264-271.
Grove, "Surface Field-Effect Transistors" and Characteristics of Surface Field-Effect Transistors, Physics and Technology of Semiconductor Devices, (1967) pp. 321-327.

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