Static information storage and retrieval – Interconnection arrangements
Patent
1998-04-09
1999-08-24
Dinh, Son T.
Static information storage and retrieval
Interconnection arrangements
365 51, G11C 506
Patent
active
059432535
ABSTRACT:
A semiconductor memory device includes at least one cell block including an array of memory cells, a plurality of sense amplifiers which temporarily hold data of the memory cells, a first data bus connected to the plurality of sense amplifiers via first gates, and a second data bus having a direct electrical connection to the first data bus and being laid out to extend through a position of the at least one cell block.
REFERENCES:
patent: 5499215 (1996-03-01), Halta
patent: 5546349 (1996-08-01), Watanabe et al.
patent: 5657265 (1997-08-01), Yoo et al.
patent: 5838604 (1998-11-01), Tsuboi et al.
Eto Satoshi
Higashiho Mitsuhiro
Kano Hideki
Kawabata Kuninori
Kitamoto Ayako
Dinh Son T.
Fujitsu Limited
LandOfFree
Semiconductor memory device with efficient layout does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device with efficient layout, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with efficient layout will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-473112