Parallel multiplier that supports multiple numbers with differen

Details Parallel multiplier that supports multiple numbers with differen Parallel multiplier that supports multiple numbers with differen

1996-10-21

1999-08-24

Moise, Emmanuel L.

Boots, shoes, and leggings

36476002, 36478603, G06F 752

Patent

active

059432500

ABSTRACT:
A parallel multiplier for multiplying a multiplicand and multiplier with large bit lengths as well as simultaneously multiplying several multiplicands and multipliers with smaller bit lengths is disclosed. The parallel multiplier receives an N-bit multiplicand operand, an M-bit multiplier operand, and a data length signal. The parallel multiplier calculates an N+M bit product of an N-bit multiplicand from the multiplicand operand and an M-bit multiplier from the multiplier operand when the data length signal selects a first bit length. Furthermore, the parallel multiplier simultaneously calculates an (N+M)/2 bit first product of an N/2 bit first multiplicand from the multiplicand operand and an M/2 bit first multiplier from the multiplier operand, and an (N+M)/2 bit second product of an N/2 bit second multiplicand from the multiplicand operand and an M/2 bit second multiplier from the multiplier operand when the data length signal selects a second bit length.

REFERENCES:
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patent: 5060183 (1991-10-01), Sakashita et al.
patent: 5181185 (1993-01-01), Han et al.
patent: 5303176 (1994-04-01), Hrusecky et al.
patent: 5325320 (1994-06-01), Chiu
patent: 5506799 (1996-04-01), Nakao
patent: 5691930 (1997-11-01), Kim
patent: 5764558 (1998-06-01), Pearson et al.

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