Semiconductor memory device with variable self-refresh cycle

Details Semiconductor memory device with variable self-refresh cycle Semiconductor memory device with variable self-refresh cycle

1984-09-13

1987-12-29

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Data refresh

365212, 307301, G11C 700

Patent

active

047165510

ABSTRACT:
A semiconductor memory device with an internal refresh circuit is disclosed. The internal refresh circuit includes a timer circuit which generates a refresh request signal in a shorter cycle at a high temperature and in a longer cycle at a low temperature. The cycle of a self-refresh mode can be thereby lengthened in a low temperature to reduce a power consumption in the self-refresh mode.

REFERENCES:
patent: 3705392 (1972-12-01), Appelt
patent: 3851316 (1974-11-01), Kodama
patent: 4390972 (1983-06-01), Machida
patent: 4393477 (1983-07-01), Murotani
Yamada et al., "A 64k Bit MOS Dynamic Ram with Auto/Self Refresh Functions", Electronics and Communications in Japan, vol. 66-C, No. 1, Jan. 1983, pp. 103-110.

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