Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-09-12
1999-08-24
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
216 67, 216 79, 438743, 438744, H01L 2100
Patent
active
059424460
ABSTRACT:
A method for forming a patterned silicon containing dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a silicon containing dielectric layer. There is then formed upon the silicon containing dielectric layer a hard mask layer, where the hard mask layer leaves exposed a portion of the silicon containing dielectric layer. There is then etched partially through a first plasma etch method the silicon containing dielectric layer to form a partially etched silicon containing dielectric layer. The first plasma etch method employs a first etchant gas composition comprising a first fluorocarbon etchant gas which predominantly forms a fluoropolymer layer upon at least the hard mask layer. Finally, there is then etched through a second plasma etch method the partially etched silicon containing dielectric layer to form a patterned silicon containing dielectric layer. The second plasma etch method employs a second etchant gas composition comprising a second fluoro etchant gas which predominantly etches the partially etched silicon containing dielectric layer in forming the patterned silicon containing dielectric layer.
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Chen Chao-Cheng
Yu Chen-Hua
Ackerman Stephen B.
Powell William
Saile George O.
Szecsy Alek P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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