Method of fabricating a mesa stripe on a semiconductor wafer pla

Details Method of fabricating a mesa stripe on a semiconductor wafer pla Method of fabricating a mesa stripe on a semiconductor wafer pla

1985-12-09

1987-06-30

Bashore, S. Leon

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156647, 156649, 1566591, 1566611, 156662, 29569L, 148DIG95, H01L 2166

Patent

active

046768637

ABSTRACT:
A method of fabricating a semiconductor crystal mesa stripe whose waist section is narrower than the upper plane of said mesa stripe. The method comprises the steps of forming a first striped mask on the semiconductor crystal wafer in order to fabricate a prescribed mesa stripe, linearly arranging a plurality of second striped masks, narrower than said first striped mask by the prescribed waist width of the main mesa stripe, on the semiconductor wafer plane at prescribed intervals and in parallel with said first striped mask in order to fabricate monitor mesa stripes; and of subjecting said semiconductor wafer plane to mesa etching.

REFERENCES:
patent: 3813585 (1974-05-01), Tarui et al.
patent: 4099305 (1978-07-01), Cho et al.
patent: 4171234 (1979-10-01), Nagata et al.
patent: 4354898 (1982-10-01), Coldren et al.
patent: 4366569 (1982-12-01), Hirao et al.
patent: 4468850 (1984-09-01), Liau et al.
patent: 4595454 (1986-06-01), Dautremont-Smith et al.
"Fabrication Characterization and Analysis of Mass-Transported GaInAsP/InP Buried-heterostructure Lasers", IEEE, vol. QE-20, No. 8.855 Aug. 1984.

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