Sense amplifier circuit and semiconductor memory device

Details Sense amplifier circuit and semiconductor memory device Sense amplifier circuit and semiconductor memory device

2009-08-26

2011-12-06

Phung, Andy (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000

Reexamination Certificate

active

08072828

ABSTRACT:
A single-ended sense amplifier circuit comprises first and second MOS transistors and first and second voltage setting circuits. The first MOS transistor supplies a predetermined voltage to the bit line and switches connection between the bit line and a sense node in response to a control voltage, and the second MOS transistor having a gate connected to the sense node amplifies a signal transmitted from the bit line via the first MOS transistor. The first voltage setting circuit sets the bit line to a first voltage, and the second voltage setting circuit sets the sense node to a second voltage. In the sense amplifier circuit, after setting the bit line and the sense node to respective voltages, the bit line is driven in a charge distributing mode via the first MOS transistor so that a signal voltage at the sense node is amplified by the second MOS transistor.

REFERENCES:
patent: 5237533 (1993-08-01), Papaliolios
patent: 6154402 (2000-11-01), Akita
patent: 6594187 (2003-07-01), Ito
patent: 6710628 (2004-03-01), Afghahi et al.
patent: 6901019 (2005-05-01), Terzioglu et al.
patent: 11-16384 (1999-01-01), None
patent: 2000-195268 (2000-07-01), None
patent: 2002-157885 (2002-05-01), None
patent: 2007-73121 (2007-03-01), None

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