Memory compression implementation using non-volatile memory...

Details Memory compression implementation using non-volatile memory... Memory compression implementation using non-volatile memory...

2008-07-14

2011-10-11

Elmore, Stephen (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S161000, C711S170000

Reexamination Certificate

active

08037251

ABSTRACT:
A method, an apparatus and a program product may enable scalable bandwidth and memory for a system having processor with directly attached memory. Multiple memory expander microchips may include non-volatile memory to provide additional memory bandwidth and capacity while in communication with the processor. The uncompressed data region may be implemented with standard high speed dynamic random access memory. The less frequently accessed compressed data region may be implemented with non-volatile memory to leverage its benefits of higher density, more capacity, and lower power compared to DRAM. Memory and bandwidth allocation between may be dynamically adjusted.

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